VLSI Implementation of Low Power Area Efficient Fast Carry Select Adder
نویسندگان
چکیده
منابع مشابه
128 Bit Low Power and Area Efficient Carry Select Adder
Carry Select Adder (CSLA) which provides one of the fastest adding performance. Traditional CSLA require large area and more power. Recently a new CSLA adder has been proposed which performs fast addition, while maintaining low power consumption and less area. This work mainly focuses on implementing the 128 bit low power and area efficient carry select adder using 0.18 μm CMOS technology. Base...
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Adder being the basic hardware block of any arithmetic operation, the major constraint in the field of signal processors, data processors to perform any operations are highly dependent on the adder performance of the circuit. The gate level implementation of the carry select adder (CSLA) and modified carry select adder has significantly reduced the area and power consumption which replaced the ...
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In this paper, we have proposed a modified carry select adder which is known as fastest adders that can perform arithmetic operations in Digital signal processors. Modification in the gate level of the Square root Carry Select Adder (SQRT CSLA) structure results in the reduction of area and power of the CSLA structure which offers a simple and efficient function. Depending upon the Regular SQRT...
متن کاملHard ware implementation of area and power efficient Carry Select Adder using reconfigurable adder structures
In data processing processors, adder is a basic digital circuit. To perform any arithmetic operation, addition is the basic operation to perform. To compute fast arithmetic operations adder must be fastest. CSLA is the fastest adder when compare to RCA and CLA. From the structure of CSLA it is observed that there is a scope to reduce area further so that power can be lowered [3-4]. This paper p...
متن کاملDesign of Area and Power Efficient Modified Carry Select Adder
Adders are one of the widely used digital components in digital integrated circuit design. The Carry Select Adder (CSA) provides a good compromise between cost and performance in carry propagation adder design. However, conventional CSA is still area-consuming due to the dual ripple carry adder (RCA) structure. In this paper, modification is done at gate-level to reduce area and power consumpti...
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ژورنال
عنوان ژورنال: International Journal of Computer Applications
سال: 2015
ISSN: 0975-8887
DOI: 10.5120/20153-2298